Abstract: In the present paper, a model-based nullator-norator approach is developed to automated localization and identification of parametric faults in analog circuits. The Cadence PSpice simulator is used for the computer realization of the diagnosis approach. The fault identification is reduced to parametric analysis in the frequency domain of the diagnosis model. An example is presented to demonstrate the feasibility of the proposed approach.
Keywords: Analog circuit diagnosis, Fault modeling, Model-based diagnosis, Parametric faults, Nullarors and norators, PSpice simulation.