Abstract: Principles and possibilities of synthesis and design of quaternary multiple-valued regenerative CMOS logic circuits with high-impedance output state are described and proposed in the paper. Two principles of synthesis and implementation of CMOS regenerative quaternary multiple-valued logic circuits with high-impedance output state are proposed and described: the simple circuits with smaller number of transistors, and the buffer/driver circuits with decreased propagation delay time. The schemes of such logic circuits are given and analyzed by computer simulations. Some of computer simulation results confirming descriptions and conclusions are also given in the paper.
Keywords: Quaternary multiple-valued logic circuits, regenerative logic circuits, high-impedance output state, CMOS logic circuits, computer simulation, pSpice simulation.