Facta Univ. Ser.: Elec. Energ., vol. 24, No. 3, December 2011, pp. 303-324

Overview about Low-Level and High-Level Decision Diagrams for Diagnostic Modeling of Digital Systems

Invited paper

Raimund Ubar

Abstract: BDDs have become the state-of-the-art data structure in VLSI CAD. In this paper, a special class of BDDs is presented called Structurally Synthesized BDDs (SSBDD). The idea of SSBDDs is to establish one-to-one mapping between the nodes of SSBDDs and signal paths in the related digital circuit. Such a mapping allowed to investigate and solve with SSBDDs a lot of test and diagnosis related problems of digital circuits, which are associated explicitly with the structure. Such problems are, for example, direct representation of faults, fault collapsing and fault masking, delay testing, hazard detection, etc. The main concept of using SSBDDs is laying on the topological view on the graphs, where each path on a SSBDD can be mapped directly to a subcircuit of the related circuit. Such a topological view allowed to generalize the knowledge and methods of test synthesis and fault analysis from the Boolean level to higher register-transfer and behavior levels of digital systems by introducing High- Level DDs (HLDD). The paper gives a short historical overview of the development of SSBDDs and HLDDs.

Keywords: Binary Decision Diagrams; logic level and high level BDDs; structurally synthesized BDDs.

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