Abstract: This article describes the design of ultra-low-power multipliers on quantum-dot cellular automata (QCA) nanotechnology, promising very dense circuits and high operating frequencies, using a single homogeneous layer of the basic cells. We construct structures without the earlier noise problems, verified by the QCADesigner coherence vector simulation. Our results show that the wiring overhead of the arithmetic circuits grows quadratically with the operand word length, and our pipelined array multiplier has linearly better performance-area efficiency than the previously proposed serial-parallel structure. Power analysis at the fundamental Landauer's limit shows, that the operating frequencies will indeed be bound by the energy dissipated in information erasure: under irreversible operation, the limits for the clock rates on molecular QCA are much lower, than the switching speeds of the technology.
Keywords: Low-power design, nanotechnology, quantum-dot-cellular automata, arithmetic, multiplier, reversible computing.