Facta Univ. Ser.: Elec. Energ., vol. 16, No. 2, August 2003, pp. 288-290

James S. Evans, Gregory I. Trimper
ITANIUM ARCHITECTURE FOR PROGRAMMERS: Understanding 64-bit Processors and EPIC Principles
Softcover, pp. 529, plus XXXIV, $ 63,99
Prentice Hall Inc., Upper Saddle River, New Jersey 07458, 2003
ISBN 0-13-101372-6
http://www.pearsoneduc.com

In general about the book

Microprocessors today permeate the entire computer industry. Almost every business using computers, from the large and complex process control systems to manufacturers of household products such as Radio and TV sets, use computing engines containing microprocessors. In spite of their impressive development trend, during the last 30 years, microprocessors continue on the relentless path to provide performance. Namely, every new innovation in computing- multimedia presentations, mobile computing, distributed computing on the Internet, Java programming, etc., requires more cycles and computing power. Design innovations, computer technology manufacturing process improvements, and integrated circuit advances have been the main driving forces in increasing microprocessors performance. To continue this growth in the future Hewlett Packard and Intel architects found that instruction-level parallelism (ILP) could be exploited for further performance increases. The 64-bit Itanium is one of the first architecture that brings ILP features to general-purpose microprocessors. This book is focused on Itanium architecture. It is divided into 13 chapters, six appendices, Bibliography, Answers and Hints for Selected Exercises, Information About the Authors, and an Index. The contents of the book are discussed in the following, in some details.

Chapter content

Chapter 1 (Architecture and Implementation, pp. 1-23) steer the book in the good direction. The introduction and definitions of terms architecture and implementation are given, life cycles of several computer architectures are considered, and a brief review of number systems is given. Chapter 2 (Computer Structures and Data Representation, pp. 25-47) explains the function of the basic building blocks, CPU, memory and Input-Output system, and involves information units and data types that Itanium uses. Chapter 3 (The Program Assembler and Debugger, pp. 49-81) starts with explanation of program development steps. After that assembler statement types and functions of a symbolic assembler are discussed. In the end the assembly-, linking-, and debugging-processes are given. Chapter 4 (Itanium Instruction Formats and Addressing, pp. 43-122) begins its analysis with the different formats of Itanium instructions. Several types of instructions, such as arithmetic-, data access-, and ALU-instructions are discussed. In addition Itanium addressing modes are presented. Chapter 5 (Comparison, Branches and Predication, pp. 123-154) describes the concept of hardware basis for control flow, and involves integer compare instructions, program branching instructions, instructions for manipulating with loops, and other structure programming constructs used by high level languages (HLLs). Chapter 6 (Logical Operations, Bit-Shifts, and Bytes, pp. 155-188) concentrates first on logical instructions. After that, bit field operations are described. Finally, instructions for integer multiplication and division, instructions for converting an integer to decimal format, and instructions using byte manipulations are considered.

In general, Chapter 1 through 6 discusses the fundamental aspects of computer architecture by analyzing instructions for handling integer data, predication, and control loop.

Chapter 7 (Subroutines, Procedures, and Functions, pp. 189-230) focuses on important topics of subroutines, procedures, and functions. Chapter 8 (Floating-Point Operations, pp. 231-263) presents the IEEE-compliant floating-point instructions, concentrating on double-precision formats. Chapter 9 (Input and Output of Text, pp. 265-289) discusses some of the I/O functions of the C language, and points to the fact how they can be called in analogous ways from an Itanium assembly language program, in either HP-UX or Linux programming environments. In Chapter 10 (Performance Considerations, pp. 293-337) a broad range of hardware-software performance considerations, from a programmer's perspective, are discussed. Chapter 11 (Looking at Output from Compilers, pp. 339- 376) continues the discussion of optimization at the assembly languages (topics considered in Chapter 10) to an exploration of the capabilities of compilers for HLLs. Chapter 12 (Parallel Operations, pp. 377-392) considers instructions with a different sort of variability. It describes how operations with data less than 64 or 82 bits in width packed into integer or floating point registers, respectively, can be executed in parallel. Chapter 13 (Variations among Implementations, pp. 393- 412) discusses the various implementations that may occur within the Itanium architecture over its life cycle.

The text includes six appendices designed to introduce maximum flexibility into the presented material. Appendix A (Command-Line Environments, pp. 413-418) provides a general overview of HP-UX or Linux command-line programming environments. Appendix B (Suggested System Resources, pp. 419-428) outlines some concise information about system resources and configurations suitable for those teaching and learning the material covered in the book. Appendix C (Itanium Instruction Set, pp. 429-447) lists the basic information for Itanium instructions, indexed by function and by assembler opcode. Appendix D (Itanium Registers and their uses, pp. 449-458) covers brief details concerning each type of register. Appendix E (Conditional Assembly on Macros (GCC Assembler), pp. 459-478) presents details related to capabilities of the GCC assembler for repeat blocks, conditional assembly, and macros. Appendix F (Inline Assembly, pp. 479-483) points to inline assembly as a method to integrate assembly language into a high level language. The Bibliography (pp. 485-493) which list of references counts 131 entries, Answer and Hints for Selected Exercises (pp. 495-502) includes numeric answers for many specific exercises, and Index that contains many useful keywords brings the book to completion.

Useful book

In summary, I found the book clear, interesting, very timely, well written, and well organized. The book is somehow self-contained, although I believe the reader would feel more comfortable by having a solid understanding of computer architecture, advanced microprocessor systems, and assembly programming. In my opinion, this book is tailored toward experienced designers, researchers, and graduate students who want to learn more about advanced instruction processing concepts in contemporary microprocessor chips, or for anyone looking for a very up to date text on advanced microprocessor systems.

Overall, this book is a great contribution to the field of microprocessor systems, and is a book worth enough to be in any computer architecture designer's collection.

Prof. Mile Stojcev
Faculty of Electronic Engineering Nis
Beogradska 14, PO BOX 73
18000 Nis, Serbia and Montenegro