Abstract: The paper presents a new concept of parallel computer architecture which provides additionally to an array structure of equally structured basic modules a second layer of an online observation and controlling network. Each basic module assembles a group of four processing units, their control unit, four dual ported RAM and all communication channels to the neighboor units and to the observation network. The proposed method permits as well a reconfiguration in case of hardware faults as - with the help of a new distributed operating system - a new solution of load balancing which determines free computing capacities under the aspect of processor- memory- and communications channel - loads, avoiding high amounts of communication.
Key words: Computer, fault tolerant computer, parallel computer architecture, reconfigurable structure.